Offset Reduction Techniques in High-Speed Analog-to-Digital Converters
工程热物理Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed. 978904818194001660
Written with educational practitioners in mind and set in a framework of progressive epistemology and pedagogy